Senior Digital Verification Engineer (La Tene, Switzerland)
Per International Ltd
La Tene,Switzerland
vor 6 Tg.

Senior Digital Verification Engineer


We’re looking for an experienced Senior Digital Verification Engineer to be part of one of the most innovative low power IC developers in the world.

As a Senior Digital Verification Engineer, you will be responsible for strengthening the digital team and verification methodology development in close collaboration with SW and analog / RF teams.

We are looking for an experienced professional motivated to drive design, methodology and best practices with a direct effect on product’s quality and BU bottom line.

Key Responsibilities And Activities Include

  • Own and develop future proof verification strategy, review and improve existing environment
  • Perform state-of-the-art ultra-low power digital design verification using UVM methodology (System Verilog). Build and reuse models, monitors and checkers
  • Debug failures, fix testbench / model / checker issues, manage bug tracking, analyze and improve verification coverage, including requirement tracking
  • Improve verification methodology and strategy to cut down the development time while maintaining strong validation quality
  • Education And Experience Requirements

  • Min. Masters in Electrical / Electronic Engineering
  • At least 5-10 year experience in similar position and industry
  • Proven track record in digital verification methodologies of integrated circuits including testbench architecture, script writing, scoreboard and coverage methodology
  • Knowledge of all digital verification steps (RTL, gate level, formal verification)
  • Knowledge of UVM methodology System Verilog (class approach) and VHDL
  • Verifying SOCs using SystemVerilog, testbenches, checkers, models and tests
  • Experience with HW / SW cosimulation
  • Experience with mixed signal verification (analog / digital / SW)
  • Wireless protocol knowledge (like BLE) is a strong plus
  • Experience with Automotive is a strong plus
  • High level modelling (C / SystemC / C++) and knowledge on agile SW methods is plus
  • Solid python skills is a plus
  • Features & Benefits

  • A role in a growing, dynamic and multi-cultural, multi-disciplinary team where everyone can make a difference
  • The opportunity to bring your experience and ideas to the table
  • A place to contribute to state-of-the-art and innovative IC design methodology and tools
  • Team atmosphere
  • International work environment and travelling opportunities
  • Relocation assistance to be provided by the company
  • Competitive salaries and benefits
  • Personality

  • Strong autonomy in his field, good communication skills, strong team player
  • Ability to contribute to a multi-disciplinary team in a constructive and data-driven approach
  • Used to work in multicultural, multi-site team environment
  • For interested applicants, kindly send your cv at cv

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