Sr. ASIC Development Engineer - Digital Design & Verification

Power Integrations

Biel, Switzerland

vor 19 Std.

Description

Power Integrations, Inc., is a Silicon Valley-based supplier of high-performance electronic components used in high-voltage power-conversion systems.

Our integrated circuits and diodes enable compact, energy-efficient AC-DC power supplies for a vast range of electronic products including mobile devices, TVs, PCs, appliances, smart utility meters and LED lights.

Our SCALE™ IGBT drivers enhance the efficiency, reliability and cost of high-power applications such as industrial motor drives, solar and wind energy systems, electric vehicles and high-voltage DC transmission.

For our High Power team located in Biel / Bienne, Switzerland, Power Integrations is currently recruiting for a Sr. ASIC Development Engineer - Digital Design & Verification

Responsibilities

Feasibility study, product architecture definition and digital blocks design for our ASIC drivers.

Development of functional digital blocks and contribution to complete mixed signal ASICs from definition to full production maturity

Perform RTL design (VHDL, Verilog) and synthesis, providing documented compliance to performance and quality requirements.

Define DFT concept and integration system architecture. Perform scan-chain insertion, ATPG generation and guarantee test coverage to achieve automotive standard.

Digital blocks circuit design and simulation, top level regression verification and simulation.

Layout floorplannig, place & rout, ensure post-layout timing closure.

Fully embedded in ASIC team for development of economic, efficient and demanding gate driver products

Generate Design Documentation Reports and participate to Design Reviews.

Drive and / or support risk assessment, risk management and Design / Product FMEAs.

Drive and / or support preparation of product level verification & validation plans.

Support or execute product validation and debug activities working with Product, Quality and Test engineering up to production ramp-up.

Contribute to Technology Process and Design Methodology improvements.

Education and Experience

Minimum 5 years’ experience with a proven track record on digital designs implemented in different IC technologies (BCD, CMOS, BiCMOS)

Good knowledge of analog & mixed signal IC architectures and integration requirements.

Basic understanding of power semiconductors and their applications is a plus

Proactivity and focused on results, while keeping a strong team player mentality.

Language : Fluent in English, German is a plus.

Solid knowledge of hardware description language (VHDL, Verilog), with System Verilog being a plus.

Good experience with common design tools (Cadence Xcelium, Synopsys Design Compiler).

Solid knowledge of Unix OS and scripting languages (Perl, Python).

Experience in complete RTL to GDS flow is a plus.

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