As part of EM Microelectronic - SA, based in Marin, Switzerland, you will be acting as IC Layout Engineer and will also take care of frame assembly of Multi Project Wafer ( MPW ).
The position requires knowledge of the IC physical development from layout design to mask & IC manufacturing :
Layout Analog IPs for the Business Units. - Design layout for complex mixed signal, and analog circuits - Utilize advanced CAD tools for mask design -
Deliver clean layout data for Tape-out and mask generation.
Multi Project Wafer Assembly ( MPW )
Working in close collaboration with Process Development & Process Control Teams, you will be responsible for the MPW Assembly (one shuttle every 3 month) :
Collect GDSII from the Business Units, Process Development and External companies every quarter
Layout the frame and do the assembly ( placement of the testchips, alignment marks, scribe, ), run booleans and related verifications to ensure the Mask are generated as specified
Must be familiar with layout flow using Cadence Open Access tools and also Mask Generation flow
Knowledges of Calibre DRV & Maks Compose is a plus
Excellent interpersonal and communication skills is a must to interface with the teams in EM and the Maskshop
Pro-active working style to solve issues with minimum negative impact on planning and quality of masks
For this position we can only consider EU passport holders !
To be successful in this position you need to have following experience :
Bachelor in electronics engineering
Minimum of 3 years experience in Analog Layout and / or MPW Assembly
Strong analog layout skills and techniques
Familiar with Layout environment : Cadence Virtuoso Layout XL and physical verification with DRC and LVS tools
Some experience with scripting languages : SKILL, TCL and UNIX scripts
Knowledge of mask processing, device construction and fab processing
Fluent in English is a must
French would be an strong advantage
Any other language is welcome
EM Microelectronic-Marin LtdRue des Sors 3CH-2074 Marin-Epagnier